UNIT 1:
Flynn’s Classification, System Attributes to Performance, Parallel computer models Multiprocessors and multicomputer, Multivector and SIMD Computers. Data and resource dependences, Hardware and software parallelism, Program partitioning and scheduling, Grain size and latency, Control flow, data flow and Demand driven mechanisms. Static interconnection networks, Dynamic interconnection Networks: Bus Systems, Crossbar Switch, Multiport Memory, Multistage and Combining Networks

UNIT 2:
Instruction set architecture, CISC Scalar Processors , RISC Scalar Processors, VLIW architecture, Memory Hierarchy, Inclusion, Coherence and Locality, Memory capacity planning. Interleaved memory organization- memory interleaving, pipelined memory access, Bandwidth and Fault Tolerance. Backplane Bus System :Backplane bus specification, Addressing and timing protocols, Arbitration transaction and interrupt.

UNIT 3:
Linear pipeline processor, Nonlinear pipeline processor, Instruction pipeline design, Mechanisms for instruction pipelining, pipeline hazards, Dynamic instruction scheduling – score boarding and Tomosulo’s algorithm, Branch handling techniques, Arithmetic Pipeline Design, Static arithmetic pipeline, Multifunctional arithmetic pipelines. Superscalar pipeline design, Super pipeline processor design.

UNIT 4:
Cache coherence, Snoopy protocols, Directory based protocols. Message routing schemes in multicomputer network, deadlock and virtual channel. Vector Processing Principles, Vector Instruction types, Vector-access memory schemes. Vector supercomputer architecture, SIMD organization: distributed memory model and shared memory model. Principles of Multithreading: Multithreading Issues and Solutions, Multiple-Context Processors

UNIT 5:
Parallel Programming Models, Shared-Variable Model, Message-Passing Model, Data-Parallel Model, Object-Oriented Model, Functional and Logic Models, Parallel Languages and Compilers, Language Features for Parallelism, Parallel Programming Environment, Software Tools and Environments